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u-boot 第一阶段启动流程

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ID:72519发表于 2015-1-23 01:29|只看该作者回帖奖励
一、u-boot启动流程

       第一步：
       S5pc100中IROM中的代码 自动将NAND FLASH的前16KB拷贝到SRAM的0x34000 ，然后bootload的第一部分开始执行，初始化DRAM。
      
       第二步：
       bootload将nandflash中所有的bootload拷贝到DRAM中。

       第三步：
       跳转到DRAM中开始执行bootload的第二部分代码。


二、第一阶段启动流程

裁剪之后的start.S文件如下：
  1.    .globl _start
  2.    _start: b       reset

  4.    /***********************************设置异常向量表***************************************/
  5.          ldr       pc, _undefined_instruction
  6.          ldr       pc, _software_interrupt
  7.          ldr       pc, _prefetch_abort
  8.          ldr       pc, _data_abort
  9.          ldr       pc, _not_used
  10.          ldr       pc, _irq
  11.          ldr       pc, _fiq

  13.    _undefined_instruction: .word undefined_instruction
  14.    _software_interrupt:       .word software_interrupt
  15.    _prefetch_abort:       .word prefetch_abort
  16.    _data_abort:           .word data_abort
  17.    _not_used:           .word not_used
  18.    _irq:                 .word irq
  19.    _fiq:                 .word fiq
  20.    _pad:                 .word 0x12345678 /* now 16*4=64 */

  22.    .balignl 16,0xdeadbeef

  24.    /**************************************设置异常向量表************************************/






  31.    _TEXT_BASE:
  32.          #TEXT_BASE 0x20f00000
  33.          .word       TEXT_BASE

  35.    _armboot_start:
  36.          #_start 0x20f00000
  37.          .word _start

  39.    /*
  40.    * These are defined in the board-specific linker script.
  41.    *链接脚本指定:
  42.    *__bss_start bss段起始地址
  43.    *__end     bss段结束地址
  44.    */
  45.    _bss_start:
  46.          .word __bss_start

  48.    _bss_end:
  49.          .word _end

  51.    /*
  52.    * the actual reset code
  53.    */

  55.    /******************************设置ARM核为SVC管理模式********************************/
  56.    reset:
  57.          /*
  58.          * set the cpu to SVC32 mode
  59.          * 切换ARM核到管理模式
  60.          */
  61.          mrs       r0, cpsr
  62.          bic       r0, r0, #0x1f
  63.          orr       r0, r0, #0xd3
  64.          msr       cpsr,r0

  66.    /*****************************设置ARM核为SVC管理模式*********************************/
  67.         







  75.          bl       cpu_init_crit
  76.         




  81.    /*********************************搬移u-boot到DRAM************************************/

  83.    #if  NOR FLASH 启动      
  84.    relocate:                       @ relocate U-Boot to RAM
  85.          adr       r0, _start           @ r0< - current position of code
  86.          ldr       r1, _TEXT_BASE           @ test if we run from flash or RAM
  87.          cmp       r0, r1                 @ don't reloc during debug
  88.          beq       stack_setup

  90.          ldr       r2, _armboot_start
  91.          ldr       r3, _bss_start
  92.          sub       r2, r3, r2           @ r2< - size of armboot
  93.          add       r2, r0, r2           @ r2< - source end address

  95.    copy_loop:                       @ copy 32 bytes at a time
  96.          ldmia       r0!, {r3 - r10}           @ copy from source address [r0]
  97.          stmia       r1!, {r3 - r10}           @ copy to   target address [r1]
  98.          cmp       r0, r2                 @ until source end addreee [r2]
  99.          ble       copy_loop

  101.    #else NAND FLASH 启动
  102.         
  103.    relocate:                       @ relocate U-Boot to RAM
  104.          adr       r0, _start           @ r0< - current position of code
  105.          ldr       r1, _TEXT_BASE       @ test if we run from DRAM or SRAM
  106.          cmp       r0, r1                 @ don't reloc during debug
  107.          beq       stack_setup
  108.         
  109.          ldr sp,_TEXT_BASE
  110.         
  111.          ldr r0,_TEXT_BASE      
  112.          mov r1,#0x0
  113.          mov r2,#0x50000

  115.          bl  copy_uboot_to_dram

  117.    #endif

  119.    /**************************搬移u-boot到DRAM************************************/







  127.    /**********************************设置栈空间****************************************/






  134.          /* Set up the stack */
  135.    stack_setup:
  136.          ldr       r0, _TEXT_BASE           @ upper 128 KiB: relocated uboot
  137.          sub       r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area [1M + 128KB]
  138.          sub       r0, r0, #CONFIG_SYS_GBL_DATA_SIZE @ bdinfo   [128字节]
  139.          sub       sp, r0, #12           @ leave 3 words for abort-stack
  140.          and       sp, sp, #~7           @ 8 byte alinged for (ldr/str)d


  143.    /*******************************设置栈空间********************************************/



  147.    /**********************************清除BSS段*******************************************/

  149.          /* Clear BSS (if any). Is below tx (watch load addr - need space) */
  150.    clear_bss:
  151.          ldr       r0, _bss_start           @ find start of bss segment
  152.          ldr       r1, _bss_end           @ stop here
  153.          mov       r2, #0x00000000           @ clear value
  154.    clbss_l:
  155.          str       r2, [r0]           @ clear BSS location
  156.          cmp       r0, r1                 @ are we at the end yet
  157.          add       r0, r0, #4           @ increment clear index pointer
  158.          bne       clbss_l                 @ keep clearing till at end
  159.         

  161.    /*********************************清除BSS段*******************************************/







  169.    /***************************调到内存中执行第二阶段****************************************/


  172.          //跳到内存中执行第二阶段代码
  173.          ldr       pc, _start_armboot       @ jump to C code

  175.    /************************调到内存中执行第二阶段*******************************************/

  177.    _start_armboot: .word start_armboot






  184.    cpu_init_crit:
  185.          /*
  186.          * Invalidate L1 I/D:使cache无效
  187.          */
  188.          mov       r0, #0                 @ set up for MCR
  189.          mcr       p15, 0, r0, c8, c7, 0       @ invalidate TLBs
  190.          mcr       p15, 0, r0, c7, c5, 0       @ invalidate icache

  192.          /*
  193.          * disable MMU stuff and caches:关MMU
  194.          */
  195.          mrc       p15, 0, r0, c1, c0, 0
  196.          bic       r0, r0, #0x00002000       @ clear bits 13 (--V-)
  197.          bic       r0, r0, #0x00000007       @ clear bits 2:0 (-CAM)
  198.          orr       r0, r0, #0x00000002       @ set bit 1 (--A-) Align
  199.          orr       r0, r0, #0x00000800       @ set bit 12 (Z---) BTB
  200.          mcr       p15, 0, r0, c1, c0, 0

  202.          /*
  203.          * Jump to board specific initialization...
  204.          * The Mask ROM will have already initialized
  205.          * basic memory. Go here to bump up clock rate and handle
  206.          * wake up conditions.
  207.          */
  208.          mov       ip, lr                 @ persevere link reg across call
  209.          bl       lowlevel_init           @ go setup pll,mux,memory
  210.          mov       lr, ip                 @ restore link
  211.          mov       pc, lr                 @ back to my caller


  214.    lowlevel_init:
  215.          mov       r9, lr

  217.          /* r5 has always zero */
  218.          mov       r5, #0

  220.          ldr       r8, =S5PC100_GPIO_BASE

  222.          /* Disable Watchdog :关开门狗 */
  223.          ldr       r0, =S5PC100_WATCHDOG_BASE           @0xEA200000
  224.          orr       r0, r0, #0x0
  225.          str       r5, [r0]

  227.          /* setting SRAM */
  228.          ldr       r0, =S5PC100_SROMC_BASE
  229.          ldr       r1, =0x9
  230.          str       r1, [r0]


  233.          /* S5PC100 has 3 groups of interrupt sources */
  234.          ldr       r0, =S5PC100_VIC0_BASE                 @0xE4000000
  235.          ldr       r1, =S5PC100_VIC1_BASE                 @0xE4000000
  236.          ldr       r2, =S5PC100_VIC2_BASE                 @0xE4000000

  238.          /* Disable all interrupts (VIC0, VIC1 and VIC2) : 禁用中断 */
  239.          mvn       r3, #0x0
  240.          str       r3, [r0, #0x14]                       @INTENCLEAR
  241.          str       r3, [r1, #0x14]                       @INTENCLEAR
  242.          str       r3, [r2, #0x14]                       @INTENCLEAR

  244.          /* Set all interrupts as IRQ */
  245.          str       r5, [r0, #0xc]                       @INTSELECT
  246.          str       r5, [r1, #0xc]                       @INTSELECT
  247.          str       r5, [r2, #0xc]                       @INTSELECT

  249.          /* Pending Interrupt Clear :清除基地址寄存器的值*/
  250.          str       r5, [r0, #0xf00]                 @INTADDRESS
  251.          str       r5, [r1, #0xf00]                 @INTADDRESS
  252.          str       r5, [r2, #0xf00]                 @INTADDRESS

  254.          /* for UART */
  255.          bl uart_asm_init

  257.          /* for TZPC */
  258.          bl tzpc_asm_init

  260.         
  261.          /* 系统时钟初始化 */
  262.          bl       system_clock_init

  264.          /*内存控制器初始化*/
  265.          bl       mem_ctrl_asm_init


  268.    1:
  269.          mov       lr, r9
  270.          mov       pc, lr
复制代码



总结:
      < 1>设置异常向量表
      < 2>设置ARM核为管理模式
      < 3>使cache无效，关闭MMU
      < 4>关闭看门狗
      < 5>设置向量中断控制器
             [1]禁用所有的中断
             [2]设置所有的中断都为IRQ异常
             [3]清除向量地址寄存器

      < 6>初始化串口引脚
      < 7>系统时钟初始化
      < 8>初始化内存控制器
      < 9>将u_boot搬移到内存
      < 10>设置栈空间
      < 11>清除BSS段
      < 12>跳到内存中执行第二阶段代码[start_armboot]
沙发
ID:837593发表于 2020-11-8 05:04|只看该作者
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